ChipAgents Expands Agentic AI Capabilities Across Digital and Analog Chip Design

ChipAgents Expands Agentic AI Platform Across Digital and Analog Semiconductor Design

ChipAgents, a category leader in agentic artificial intelligence (AI) platforms for semiconductor design, has announced the expansion of its AI-native engineering platform across digital and analog chip design. The expanded platform brings more stages of semiconductor development onto a shared agentic foundation, helping engineering teams manage increasingly complex design workflows and accelerate the development of custom silicon.

As AI models continue to evolve on a cycle measured in months, traditional semiconductor development can take 12 to 18 months or longer. This difference creates growing pressure on chipmakers to shorten development cycles while maintaining the performance, reliability and efficiency required for next-generation processors and other advanced semiconductor products.

Much of the semiconductor design process still relies on fragmented engineering tools, separate teams and disconnected workflows. Engineers frequently need to transfer context manually between development stages, interpret results from multiple systems and determine the next steps themselves. ChipAgents aims to address these challenges by using AI agents to coordinate more of the engineering process, allowing engineers to focus on design objectives while AI handles a greater share of execution.

The platform enables engineers to define objectives, constraints and critical engineering decisions. AI agents then use available design context, operate engineering tools, evaluate results and determine subsequent actions to advance the design toward completion.

“Autonomous semiconductor engineering is a systems problem,” said William Wang, founder and CEO of ChipAgents. “It is not enough to make an individual model stronger or add more agents to a workflow. The AI needs to understand the organization’s design knowledge, coordinate the right models and tools, evaluate real engineering results and account for the physical consequences of each decision. We built ChipAgents around that entire system so engineers can focus on the design objective while AI handles more of the execution underneath.”

IC-star Powers the Full-Stack Engineering Platform

At the center of the expanded platform is IC-star, ChipAgents’ chip neural engine for digital and analog semiconductor engineering. The system is designed to navigate the enormous design space associated with modern integrated circuits by assessing the current design state and identifying the next appropriate action.

Instead of requiring engineers to manually select each AI model, tool or workflow, IC-star coordinates these elements around the overall engineering objective. Its architecture combines four integrated capabilities: IC Design Ontology, Reasoning Core, Multiphysics-Aware Models and Design-Driven Model Navigator.

IC Design Ontology: Preserving Engineering Knowledge

The IC Design Ontology provides a persistent context layer for engineers and AI agents. It brings together design knowledge, engineering plans, reusable skills and customer-specific methodologies within a unified environment.

This shared context helps agents work with the information needed to understand a design and its requirements. The system is also designed to improve continuously through engineering feedback, allowing organizations to build on accumulated knowledge rather than treating every task as an isolated exercise.

For semiconductor companies, preserving institutional knowledge and design methodologies can be particularly important when projects involve specialized workflows, complex constraints and multiple engineering teams.

Reasoning Core: Coordinating Long-Horizon Workflows

The Reasoning Core plans and coordinates agents, AI models and engineering tools around a defined objective. It supports complex, multistep activities that require more than a single model response or isolated tool operation.

Examples include root-cause analysis, power-performance-area (PPA)-aware register-transfer-level (RTL) closure and analog layout generation. These workflows often involve repeated evaluation, troubleshooting and refinement before an acceptable engineering result is achieved.

By coordinating the sequence of actions and interpreting intermediate results, the Reasoning Core is intended to reduce the manual effort required to manage complex design tasks.

Multiphysics-Aware Models: Connecting AI With Physical Design

The Multiphysics-Aware Models layer is designed to predict timing, PPA, design-rule checking (DRC), design-for-test (DFT) and analog physical-design outcomes. These capabilities support multi-objective optimization during the generation process.

Renoir, ChipAgents’ semiconductor-specific, physics-aware large language model, serves as a core domain model within this layer. Incorporating physical considerations into AI-driven engineering is important because a design that appears correct at the code or schematic level may still encounter timing, power, layout or verification challenges during implementation.

The platform aims to incorporate these considerations earlier in the workflow, enabling agents to evaluate alternatives and refine designs in response to engineering feedback.

Design-Driven Model Navigator: Selecting the Appropriate AI Model

The Design-Driven Model Navigator dynamically routes tasks across available AI models according to the requirements of each activity. The system considers the quality of results, the time needed to obtain them and the associated costs.

This approach allows ChipAgents to optimize the overall engineering process rather than treating each AI task as an independent operation. Model selection, token consumption, tool execution, engineering review and physical feedback can be coordinated around the total outcome.

ChipAgents measures the value of its platform through design-convergence time, engineering effort and overall execution costs across digital and analog chip development.

Supporting Digital and Analog Chip Design

The expanded platform uses the same underlying foundation across digital and analog engineering, while addressing the distinct requirements of each discipline.

Digital workflows supported by ChipAgents include specification analysis, architecture exploration, RTL design, functional and formal verification, root-cause analysis, debugging, coverage closure and PPA-aware optimization.

These activities are central to developing and verifying digital integrated circuits. AI agents can help engineers investigate failures, evaluate design alternatives and work through verification requirements while maintaining context across multiple stages.

Analog workflows extend across topology and schematic design, simulation, behavioral modeling, layout generation and physical verification. Analog design presents different challenges because engineering decisions depend heavily on circuit behavior, waveforms and physical tradeoffs that cannot be addressed through code generation alone.

By connecting agentic execution with design context and physics-aware models, ChipAgents seeks to support dynamically programmable autonomous workflows. AI agents can generate designs, run simulations, assess results and iterate on alternatives, while engineers retain control over requirements and final signoff.

Collaboration With NVIDIA Advances AI-Native Design

ChipAgents is expanding its collaboration with NVIDIA to fine-tune NVIDIA Nemotron models for AI-native digital and analog semiconductor design workflows.

According to ChipAgents, initial results indicate that its post-trained Nemotron model achieves performance competitive with frontier models, including Fable 5.1 and GPT-6 Astra, based on open benchmarks. The company also reports that the model delivered the highest performance and best cost efficiency among the open-weight models evaluated.

These results represent progress toward AI systems capable of carrying engineering intent from initial specifications through physical implementation. The objective is to make autonomous chip design more practical and reliable by connecting specialized AI models with semiconductor-specific workflows, simulation feedback and engineering knowledge.

“The opportunity for agentic AI is to turn a chip team’s accumulated design knowledge into the ability to explore more ideas, learn from simulation and resolve engineering tradeoffs faster,” said Tim Costa, vice president and general manager of industrial and computational engineering at NVIDIA. “Pairing specialized NVIDIA Nemotron models with ChipAgents’ physics-aware workflows can shift the engineer’s role from managing each tool run to directing a design strategy, with agents translating simulation and verification feedback into the next design decision.”

Semiconductor Customers Report Workflow Improvements

ChipAgents’ expanded platform builds on more than 200 semiconductor enterprise deployments across a growing range of design and verification workflows. The company has highlighted results from several deployments that demonstrate how AI-assisted engineering can reduce the time and effort associated with specific semiconductor development activities.

Andes Technology reduced one processor-verification workflow from two to three months to approximately three weeks. The company also shortened a processor-customization project by 30%.

eMemory reduced engineering effort for datasheet analysis and verification-testbench construction by approximately 80%. These activities require engineers to interpret technical documentation and translate requirements into tests that can support verification.

Whalechip reduced semiconductor root-cause analysis from days to approximately 15 to 60 minutes per round while identifying four critical bugs. The results illustrate how AI agents can assist engineers in investigating issues and evaluating potential causes more quickly.

These outcomes relate to specific workflows and deployments, rather than establishing a uniform improvement across every semiconductor design project. Nevertheless, they demonstrate the potential for AI systems to reduce manual effort in tasks that traditionally require substantial engineering time.

Industry Leaders Highlight Design and Security Benefits

Ambiq is using ChipAgents to advance digital design workflows, with an emphasis on optimizing power, performance and area together.

“For Ambiq, advancing ultra-low-power design means optimizing power, performance, and area together. ChipAgents’ IC-star brings multi-objective optimization to our digital design workflows, helping us accelerate RTL development, test case generation, and root cause analysis,” said Scott Hanson, founder and CTO of Ambiq. “Security is a fundamental requirement for us, and ChipAgents’ focus on protecting sensitive data and IP is essential to enabling AI-native flows in our engineering environment.”

Analog Devices has also worked with ChipAgents to introduce AI into its development workflows. Dave Brownell, vice president of engineering enablement at Analog Devices, emphasized the importance of combining engineering knowledge with AI-powered assistance across the integrated-circuit design lifecycle.

“IC design demands deep engineering expertise and meticulous attention to detail. Over the past year, we have worked with ChipAgents to bring AI into our development workflows, creating a foundation that blends engineering knowledge with AI-powered assistance across the IC design lifecycle,” Brownell said. “We see tremendous potential to build on this foundation, helping our teams accelerate development and focus more of their expertise on delivering innovative, high-performance products.”

Rambus is adopting ChipAgents to accelerate chip and intellectual-property design and verification workflows.

“We are adopting ChipAgents to accelerate our chip and IP design and verification workflows,” said Simon Blake-Wilson, senior vice president and general manager of silicon IP at Rambus. “By combining Rambus’ deep semiconductor and silicon IP expertise with ChipAgents’ IC-star engine, we see an opportunity to help our customers bring advanced chips to market faster and achieve better design outcomes within their preferred design environments.”

Secure Integration With Existing Engineering Environments

ChipAgents is designed to integrate securely with customers’ existing engineering tools and workflows. Organizations can deploy the platform on-premises or in the cloud, depending on their operational requirements.

The architecture preserves organizational knowledge and supports on-premises self-improvement for companies that need greater control over proprietary design data. These capabilities address an important consideration for semiconductor developers, whose engineering environments may contain confidential circuit designs, verification results, process information and intellectual property.

By supporting existing tools and deployment preferences, ChipAgents aims to make AI adoption more practical without requiring engineering teams to abandon their established environments.

Technical Webinar to Explore IC-star

ChipAgents plans to provide a deeper technical look at the IC-star engine and its applications across digital and analog semiconductor design during a webinar scheduled for October 29.

The session is intended to offer additional insight into the platform’s architecture and how its integrated capabilities support AI-assisted engineering workflows.

As semiconductor development grows more complex and AI hardware requirements continue to evolve, ChipAgents is positioning its full-stack agentic platform as a way to connect design knowledge, AI models, engineering tools and physical feedback. By coordinating more of the work involved in digital and analog chip development, the company aims to help engineers explore design alternatives, resolve technical challenges and move toward completed designs with less manual workflow management.

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