Allegro DVT launches the DWP300 DeWarp semiconductor IP
Allegro DVT , the global leader in semiconductor IP blocks for video processing and video compliance tools , has announced the addition of its new DWP300 DeWarp IP block to its Zinia Pixel Processing IP block portfolio. This latest innovation demonstrates Allegro DVT’s ongoing commitment to providing comprehensive, high-performance solutions for next-generation imaging and video applications.
The new DWP300 DeWarp IP was designed to offer optimal silicon area and power efficiency while providing flexible, real-time geometric transformation. It combines a customizable software driver that generates mesh configurations for a wide range of geometric transformations with a dedicated hardware core capable of executing these transformations in real time across the entire video spectrum. This hybrid hardware/software approach enables precise distortion correction while allowing customers to easily tailor the solution to their specific needs.
With the rapid growth of applications such as automotive surround vision, intelligent surveillance, drones, augmented/virtual reality devices, and wide-angle camera systems, prismatic distortion correction has become a critical requirement in modern video pipelines. Thanks to its high-end video encoder, Allegro DVT enables on-the-fly distortion correction, providing a streamlined and fully optimized video processing chain. This solution reduces system complexity and memory bandwidth, while also enabling faster time to market.
“Our new DWP300 DeWarp IP marks another significant step in expanding our video processing product portfolio,” said Nouar Hamze, CEO of Allegro DVT. “By combining advanced distortion correction with our proven encoder technology, we enable our customers to deliver superior video quality while simplifying system integration and optimizing chip efficiency.”
The DWP300 DeWarp IP supports high-resolution video processing up to 4kp60 and is fully compatible with Allegro DVT’s IP Prism Encoder block, supporting H.264, HEVC, VP9, AV1, VVC, and LCEVC standards. It is optimized for ASIC implementations and meets the stringent performance and power requirements of the automotive, consumer electronics, and industrial markets.
The launch of the integrated IP DWP300 DeWarp marks another important step in Allegro DVT’s strategy to provide its customers worldwide with comprehensive and high-performance video processing solutions.
Allegro DVT is based in Grenoble, France, and also has offices in Tampere (Finland), Belfast (Northern Ireland), San Diego (USA), and Beijing (China). The company is a leading global provider of digital video technology solutions, including compliance streams and semiconductor IP blocks for video codecs focused on the H.264, HEVC, VP9, AV1, VVC, LCEVC, and AV2 standards.
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